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Advanced Information
MC44302A
ADVANCED MULTI-STANDARD VIDEO/SOUND IF
SEMICONDUCTOR TECHNICAL DATA
Advanced Multi-Standard TV Video/Sound IF
The MC44302A is a multi-standard single channel TV Video/Sound IF and PLL detector system specifically designed for use with all standard modulation techniques including NTSC, PAL, and SECAM. This device enables the designer to produce a high quality IF system with a minimum number of external components. The MC44302A contains a high gain video IF with an AGC range of 80 dB, enhanced phase-locked loop carrier regenerator for low static phase error, doubly balanced full wave synchronous video demodulator featuring wide bandwidth positive and negative video outputs with extremely low differential gain and phase distortion, video AFT amplifier, multistage sound IF limiter with FM quadrature detector and AFT for self tuning, AM sound detector, constant and variable audio outputs, dc volume control for reduced hum and noise pickup, unique signal acquisition circuit that prevents false PLL lockup and AFT push out, horizontal gating system with sync separator and phase-locked loop circuitry for self-contained RF/IF AGC operation, RF AGC delay circuitry, and programmable control logic that allows operation in NTSC, and PAL SECAM systems. This device is available in wide body 28 pin dual-in-line and surface mount plastic packages. * Multi-Standard Detector System for NTSC, PAL, and SECAM
28 1
P SUFFIX PLASTIC PACKAGE CASE 710
28 1
* * * * * * * * *
High Gain Video IF Amplifier with 80 dB AGC Range Enhanced PLL Carrier Regenerator for Low Static Phase Error Synchronous Video Demodulator with Positive and Negative Video Outputs Sound IF with Self Tuning FM Quadrature Detector AM Sound Detector DC Volume Control Unique Signal Acquisition Circuit Prevents False PLL Lockup Horizontal Gating System for Self Contained RF/IF AGC Operation RF AGC Delay Circuitry
DW SUFFIX PLASTIC PACKAGE CASE 751F (SO-28L)
PIN CONNECTIONS
DC Volume Control 1 Sound Input (FM) 2 Audio Input/ 3 Audio-Video Switch Sound 4 De-Emphasis (FM) Negative Video Out 5 Positive Video Out 6 Sound AFT Filter/ 7 Peak White Filter Video IF Input 8 Video IF Input 9 Intercarrier Sound Output 27 Audio Output (Variable) 26 Sound Quadrature Coil (FM) 25 VCC 28 24 Audio Output (Constant) 23 Sound Input (AM) 22 Gnd 21 VCO Coil 20 VCO Coil PLL Filter (Main VCO Loop) 18 Lock Detector/Filter (Acquisition Circuit) 17 Flyback/Video Input 19 16 Horizontal PLL Filter 15 RF AGC Delay
Simplified Television Block Diagram
VHF/UHF Tuner SAW Filter
Luma & Chroma Processor
Video Drivers
Video Mode Switch 10 AFT Output 11 AFT Mode Switch 12
Vertical & Horizontal Scan Circuitry
RF AGC Output 13 Video IF AGC Filter 14
Video IF
Video Detector
Sound IF
Sound Detector DC Volume Control Mode Switch Audio Amp Power Supply
(Top View)
ORDERING INFORMATION
Device MC44302ADW MC44302AP
(c) Motorola, Inc. 1997
AFT RF/IF AGC MC44302A Horizontal Gating System
Tested Operating Temperature Range TA = 0 to +70C
Package SO-28L Plastic DIP
Rev 0
This document contains information on a new product. Specifications and information herein are subject to change without notice.
MOTOROLA ANALOG IC DEVICE DATA
1
MC44302A
MAXIMUM RATINGS
AAA A AA AAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAA A AA AA AAAAAAAAAAAAAAAAAAAAAAA A AA
Power Supply Voltage VCC VIR 7.0 V V
Rating
Symbol
Value
Unit
AAA A AA AAAAAAAAAAAAAAAAAAAAAAA A AA AAA A AA AAAAAAAAAAAAAAAAAAAAAAA A AA AAAAAAAAAAAAAAAAAAAAAAA A AA AAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAA A AA AA AAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAA AA
Sound Quadrature Coil Voltage (Pin 26) VCO Coil Voltage (Pins 20, 21) VQC Iin VCC VCC 1.0 15 15 15 2.0 4.0 V V VVCO IO Flyback/Video Input Current (Pin 17) mA mA Output Current Positive and Negative Video (Pins 5, 6) Intercarrier Sound (Pin 28) Constant and Variable Audio (Pins 24, 27) RF AGC, Internally Limited (Pin 13) AFT Source or Sink (Pin 11)
Input Voltage Range Video IF (Pins 8, 9) FM Sound IF (Pin 2) AM Sound IF (Pin 23) AFT Switch (Pin 12) Audio Input/Audio Switch/Video Invert (Pin 3) Mode Switch (Pin 10) RF AGC Delay (Pin 15) Volume Control (Pin 1)
-0.3 to VCC
AAAAAAAAAAAAAAAAAAAAAAA A AA AAAAAAAAAAAAAAAAAAAAAAA A AA
Power Dissipation and Thermal Characteristics DW Suffix, Plastic Package Case 751F Maximum Power Dissipation @ TA = 70C Thermal Resistance, Junction-to-Air P Suffix, Plastic Package Case 710 Maximum Power Dissipation @ TA = 70C Thermal Resistance, Junction-to-Air Operating Junction Temperature Operating Ambient Temperature Storage Temperature PD RJA PD RJA TJ TA 800 100 mW C/W mW C/W C C C 1000 80
AAA AA AAAAAAAAAAAAAAAAAAAAAAA A AA AAA A AA AAAAAAAAAAAAAAAAAAAAAAA AAAAA A AAAAAAAAAAAAAAAAAAAAAAA A AA AA AAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAA A
+150 0 to +70 Tstg -65 to +150
NOTE: ESD data available upon request.
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, TA = 25C.)
Characteristic VIDEO IF AMPLIFIER Differential Input Impedance Components Parallel Resistance Parallel Capacitance Differential Input Voltage for Full Video Output Swing Automatic Gain Control Range Noise Figure (Vin = 1.0 mV, RS = 300 ) Bandwidth, -3.0 dB (RS = 300 ) Sound Intercarrier Output, 4.5 MHz (Vin = 1.0 mV, Note 2) VIDEO DETECTOR Output Voltage Swing (Pin 5 or 6, RL = 2.0 k, Note 1) Output Impedance (Pin 5 or 6, 1.0 MHz, 1.0 mA) Bandwidth, -3.0 dB, (RL = 2.0 k) Negative Output (Pin 5) Positive Output (Pin 6) Output Distortion, Uncorrected (RL = 2.0 k, Note 1) Differential Gain Negative Video Output Positive Video Output Differential Phase Negative Video Output Positive Video Output
Symbol
Min
Typ
Max
Unit
Rin(VIF) Cin(VIF) DVin(VIF) AGCVIF NF BWVIF VO(Snd IC) VO(VD) |ZO| BWVD
- - - - - - -
3.4 4.0 40 80 7.0 120 0.1
- - - - - - -
k pF Vrms dB dB MHz Vrms
- - - -
2.2 100 8.0 7.0
- - - -
Vpp MHz
DG - - DP - - 1.0 1.0 5.0 5.0 2.0 2.0 5.0 5.0
%
Deg
2
MOTOROLA ANALOG IC DEVICE DATA
MC44302A
ELECTRICAL CHARACTERISTICS (continued) (VCC = 5.0 V, TA = 25C.)
Characteristic VIDEO DETECTOR (CONTINUED) Residual 920 kHz Beat Output, dB Below 100% Modulated Video (Pin 5 or 6, Note 2) FM SOUND IF AND DETECTOR Input Impedance Components Parallel Resistance Parallel Capacitance Input Limiting Threshold (f = 4.5 MHz) AM Rejection (Vin = 10 mV, Notes 4, 5, 6) f = 4.5 MHz f = 5.5 MHz Recovered Audio Output (Pin 24, Vin = 10 mV, Note 4) f = 4.5 MHz f = 5.5 MHz Output Distortion (Pin 24, Vin = 10 mV, Note 4) f = 4.5 MHz f = 5.5 MHz Sound AFT (Note 7) Pull-in Range Hold-in Range Sound De-Emphasis Internal Resistance (Pin 4) AM Detector Crosstalk AM DETECTOR Input Impedance Components Parallel Resistance Parallel Capacitance Recovered Audio Output (Pin 24, Vin = 100 mV, Note 5) Output Distortion (Pin 24, Vin = 10 mV, Note 5) FM Sound IF and Detector Crosstalk DC VOLUME CONTROL Volume Control Range (Pin 1, Pin 3 = Vin) Output Signal at Minimum Volume Setting (Pin 1 = Gnd, Pin 3 = Vin ) Video Detector Sync to Audio Channel Crosstalk Fixed Output Variable Output Audio Channel Crosstalk Fixed Output to Variable Output Variable Output to Fixed Output
NOTES:
Symbol
Min
Typ
Max
Unit
BO
-
-60
-
dB
Rin(FM) Cin(FM) Vin(Snd) AMR
- - - - -
2.2 4.0 80 50 50 2.0 2.0 1.0 1.0 0.6 0.6 18 - 6.0
- - - - -
k pF V dB
VO(Snd) - - THD - - fAFT(Snd) - - RDE CtlkAM - - - - - -
Vpp
%
MHz - - - - k dB
Rin(AM) Cin(AM) VO(Snd) THD CtlkFM VO(Snd) VO(Snd) CtlkVD
- - - - -
5.6 4.0 2.0 1.0 -60
- - - - -
k pF Vpp % dB
- - - -
+12 to -70 1.0 -60 -60 -60 -60
- - - -
dB mV dB
CtlkSnd - - - -
dB
1. Vin = 1.0 mVrms signal at 45.75 MHz with 75% modulated staircase at 3.58 MHz. 2. Vin = 100 Vrms signal at 41.25 MHz added to signal in Note 1. 3. Differential carrier level at video IF inputs to cause the negative detector output to go positive by 0.1 V from ground. 4. FM Modulation = 25 kHz deviation at 1.0 kHz for 4.5 MHz intercarrier. 50 kHz deviation at 1.0 kHz for 5.5 MHz intercarrier. 5. AM Modulation = 30% depth at 1.0 kHz for 4.5 MHz and 5.5 MHz intercarrier. V O(FM) 6. AM Rejection (dB) = 20 log V O(AM) 7. Tested with 15 H sound quadrature coil in parallel with 68 pF and 10 k. 8. The AFT output can be disabled by leaving Pin 12 disconnected or by biasing it to the voltage level shown above. When disabled, the output will be internally clamped to one half of VCC.
MOTOROLA ANALOG IC DEVICE DATA
3
MC44302A
ELECTRICAL CHARACTERISTICS (continued) (VCC = 5.0 V, TA = 25C.)
Characteristic PHASE-LOCKED LOOP Acquisition Circuit Filter Voltage (Pin 18) Unlocked with No-Signal Unlocked to Locked Sweep Range upon Signal Acquisition Locked, Final Static Condition VCO Filter Voltage (Pin 19) Unlocked Locked, Final Static Condition Video IF Lock-Up Time HORIZONTAL GATING SYSTEM Sync Separator Input Threshold Voltage (Pin 17) PLL Filter Voltage, Locked or Unlocked with No-Signal (Pin 16) RF AGC RF AGC Delay Voltage Range (Pin 15) RF AGC Output Current (Pin 13) LOGIC CONTROL Mode Select Voltage Range (Pin 10) PAL 1 PAL 2 SECAM NTSC AFT Switch Threshold (Pin 12) AFT Output, Pin 11, Sourcing when IF Frequency is Low AFT Output, Pin 11, Sinking when IF Frequency is Low AFT Output, Pin 11, Disabled (Note 8) Audio Switch/Video Invert Voltage Range (Pin 3) Audio 1, Internal Audio (AM or FM) appears at Pins 24 and 27, Positive Video appears at Pin 6, Negative Video appears at Pin 5 Audio 2, Internal Audio (AM or FM) appears at Pin 24, External Audio appears at Pin 27, Positive Video appears at Pin 6, Negative Video appears at Pin 5 Video 1, Internal Audio (AM or FM) appears at Pins 24 and 27, Positive Video appears at Pin 6, Negative Video appears at Pin 5 Video 2, Internal Audio (AM or FM) appears at Pins 24 and 27, Positive Video appears at Pin 5, Negative Video appears at Pin 6 TOTAL DEVICE Operating Voltage TA = 25C TA = 0C to 70C Power Supply Current (VCC = 5.0 V)
NOTES:
Symbol
Min
Typ
Max
Unit
VPLL(Acq) - - - VPLL(VCO) - - tIF(lock) - 3.2 3.2 5.0 - - - 2.7 1.2 to 4.3 4.3 - - -
V
V
ms
Vth(Sync) VPLL(Horiz)
- -
3.4 2.9 1.1
- -
V V
VAGC(DLY) IO(sink)
- 1.0
1.7 to 2.4 2.0
- -
V mA
Vth(Mode) 4.7 to 5.0 3.5 to 4.1 2.3 to 2.9 0 to 0.3 Vth(AFT) - - - Vth(AS/VI) 3.4 to 5.0 3.3 to 5.0 - 5.0 0 2.5 - - - 4.6 to 5.0 3.4 to 4.2 2.2 to 3.0 0 to 0.4 - - - -
V
V
1.8 to 2.2
1.7 to 2.3
-
0.6 to 0.9
0.5 to 1.0
-
0 to 0.2
0 to 0.3
-
VCC 4.5 4.75 ICC - 5.0 - 100 5.5 5.5 -
V
mA
1. Vin = 1.0 mVrms signal at 45.75 MHz with 75% modulated staircase at 3.58 MHz. 2. Vin = 100 Vrms signal at 41.25 MHz added to signal in Note 1. 3. Differential carrier level at video IF inputs to cause the negative detector output to go positive by 0.1 V from ground. 4. FM Modulation = 25 kHz deviation at 1.0 kHz for 4.5 MHz intercarrier. 50 kHz deviation at 1.0 kHz for 5.5 MHz intercarrier. 5. AM Modulation = 30% depth at 1.0 kHz for 4.5 MHz and 5.5 MHz intercarrier. V O(FM) 6. AM Rejection (dB) = 20 log V O(AM) 7. Tested with 15 H sound quadrature coil in parallel with 68 pF and 10 k. 8. The AFT output can be disabled by leaving Pin 12 disconnected or by biasing it to the voltage level shown above. When disabled, the output will be internally clamped to one half of VCC.
4
MOTOROLA ANALOG IC DEVICE DATA
MC44302A
CARRIER DIFFERENTIAL INPUT VOLTAGE (mVrms)
Figure 1. IF AGC Filter Voltage versus Carrier Differential Input Voltage
IF AGC FILTER VOLTAGE, PIN 14 (V) VCC = 5.0 V fC = 45.75 MHz 2.0 RF AGC Delay, Pin 15, Open TA = 25C 1.5 1.0 0.5 0 0.01 Input Overload Region 2.5
Figure 2. Carrier Differential Input Voltage versus RF AGC Takeover Threshold
1000 VCC = 5.0 V fC = 45.75 MHz TA = 25C
100
10
1.0
0.1
1.0
10
100
1000
0.1 1.4
1.6
1.8
2.0
2.2
2.4
CARRIER DIFFERENTIAL INPUT VOLTAGE (mVrms)
RF AGC TAKEOVER THRESHOLD, PIN 15 (V)
CARRIER DIFFERENTIAL INPUT VOLTAGE (mVrms)
Figure 3. VCO Characteristics
f VCO, FREE-RUNNING CHANGE (kHz) 1000 Hold-In Range 100 Sweep Capture Range 10 Lock-In Range 1.0 0.1 0.01 41 VCC = 5.0 V fVCO = 22.875 MHz C19, C20 = 33 pF TA = 25C 42 43 44 45 46 47 48 100
Figure 4. VCO Free-Running and Offset Frequency Change versus Supply Voltage
100 50 fVCO 0 -50 foffset , OFFSET CHANGE (kHz) foffset fVCO = 22.875 MHz C19, C20 = 33 pF 50 TA = 25C 0 -50 -100 Readings are taken at five minute intervals allowing the die temperature to stabilize. -150 4.5 4.7 4.9 5.1 5.3
-100 -150 5.5
CARRIER FREQUENCY (MHz)
VCC, SUPPLY VOLTAGE (V)
Figure 5. PLL Filter Voltage versus Carrier Frequency Change
4.8 AFT OUTPUT CURRENT, PIN 11 (mA) PLL FILTER VOLTAGE, PIN 19 (V) VCC = 5.0 V fVCO = 22.875 MHz C19, C20 = 33 pF 4.0 TA = 25C 2.0
Figure 6. AFT Output Current versus Carrier Frequency Change
Pin 12 = Gnd 1.0 VCC = 5.0 V fVCO = 22.875 MHz C19, C20 = 33 pF Pin 11 = 2.5 V TA = 25C
3.2
0
2.4
-1.0 Pin 12 = VCC -2.0 -2.0 -1.0 0 1.0 2.0
1.6 -2.0
-1.0
0
1.0
2.0
CARRIER FREQUENCY CHANGE (MHz)
CARRIER FREQUENCY CHANGE (MHz)
MOTOROLA ANALOG IC DEVICE DATA
5
MC44302A
Figure 7. Video Output Frequency Response
RELATIVE DETECTED VIDEO OUTPUT (dB) 0 -4.0 -8.0 -12 -16 -20 0 4.0 8.0 12 16 Picture taken without Figure 27 correction circuit VIDEO MODULATION FREQUENCY (MHz) Negative Video Output Pin 5 Positive Video Output Pin 6 VCC = 5.0 V fC = 45.75 MHz TA = 25C
Figure 8. Vectorscope Display of 75% Saturated NTSC Color Bars
VCC = 5.0 V fC = 45.75 MHz TA = 25C
INTERNAL TUNING CAPACITANCE, PIN 26 (pF)
Figure 9. FM Sound AFT Filter Voltage versus Internal Tuning Capacitance
20 VCC = 5.0 V TA = 25C 16 12 8.0 4.0 0 1.0 Parasitic layout and coil capacitance must be considered. 2.0 3.0 4.0 SELF-TUNING FREQUENCY RANGE (MHz)
Figure 10. FM Sound Intercarrier Self-Tuning Frequency Range versus External Tank Capacitance
7.0 6.5 6.0 5.5 VCC = L3 = 5.0 5.0 V 22 H R28 = 10 k 4.5 Pin 7 = 1.5 V to 3.8 V Vin = 500 Vrms into Pin 2 4.0 Mod = 25 kHz Dev at 1.0 kHz TA = 25C 3.5 15 20 30 10 L3 = 15 H L3 = 10 H
40
50
60 70 80
100
SOUND AFT FILTER VOLTAGE, PIN 7 (V)
EXTERNAL TANK CAPACITANCE, C25 (pF)
Figure 11. FM Sound Detector Relative Output, and Signal to Noise Ratio versus Intercarrier Input Voltage
0 RELATIVE OUTPUT, PINS 24, 27 (dB) -10 -20 -30 -40 -50 -60 -70 -80 0.1 1.0 10 100 S)N N Output Level RELATIVE OUTPUT, PINS 24, 27 (dB) VCC = 5.0 V fC = 5.5 MHz Mod = 50 kHz Dev at 1.0 kHz 0 dB Output Level = 0.45 Vrms TA = 25C
Figure 12. FM Sound Detector Frequency Response
4.0 0 -4.0 -8.0 -12 -16 -20 -24 C4 = 3.3 nF VCC = 5.0 V PAL 1 Mode Selected Vin = 10 mVrms into Pin 2 fC = 4.5 MHz Dev = 25 kHz RL = 10 M CL = 10 pF TA = 25C 1.0 10 C4 = 1.0 nF C4 = 100 pF C4 = 0 pF
-28 0.1
100
1000
INTERCARRIER INPUT VOLTAGE, PIN 2 (mVrms)
INTERCARRIER MODULATION FREQUENCY, PIN 2 (kHz)
6
MOTOROLA ANALOG IC DEVICE DATA
MC44302A
Figure 13. AM Sound IF Frequency Response
4.0 RELATIVE OUTPUT, PINS 24, 27 (dB) 0 -4.0 -8.0 -12 -16 -20 -24 -28 2.0 VCC = 5.0 V SECAM Mode Selected Vin = 60 mVrms into Pin 23 Mod = 30% AM, 1.0 kHz RL = 10 M CL = 10 pF TA = 25C 5.0 10 20 50 100 200 RELATIVE OUTPUT, PIN 24, 27 (dB)
Figure 14. AM Sound Detector Frequency Response
4.0 0 -4.0 -8.0 VCC = 5.0 V SECAM Mode Selected -16 Vin = 60 mVrms into Pin 23 Mod = 30% AM -20 RL = 10 M C = 10 pF -24 T L = 25C A -12 -28 0.1 1.0 10 100 1000
INTERCARRIER FREQUENCY, PIN 23 (MHz)
INTERCARRIER MODULATION FREQUENCY, PIN 23 (kHz)
Figure 15. AM Sound Detector Linearity
DETECTOR OUTPUT VOLTAGE, PIN 24 (V) 3.0 2.5 2.0 1.5 1.0 0.5 RELATIVE OUTPUT, PIN 27 (dB) 160 VCC = 5.0 V NTSC Mode Selected fC = 4.5 MHz TA = 25C
Figure 16. Variable Audio Output Frequency Response
2.0 0 -2.0 -4.0 -6.0 VCC = 5.0 V -8.0 V = 200 mVrms into Pin 3 in Pin 3 = 22 k to Gnd -10 R = 10 M L -12 CL = 10 pF TA = 25C -14 1.0 10 0.1
0
20
40
60
80
100
120
140
100
1000
10000
INTERCARRIER INPUT VOLTAGE, PIN 23 (mVrms)
AUDIO FREQUENCY, PIN 3 (kHz)
Figure 17. Variable Audio Output Gain versus Volume Control Voltage
20 VARIABLE AUDIO OUTPUT GAIN (dB) ICC, SUPPLY CURRENT (mA) VCC = 5.0 V Audio 2 Selected, Pin 3 = 22 k to Gnd 0 Vin = 200 mVrms into Pin 3 f = 1.0 kHz TA = 25C -20 -40 -60 -80 0 160
Figure 18. Supply Current Versus Supply Voltage
Pin 25 supply current measured in Figure 28 circuit with 87.5% modulated grayscale in NTSC Mode. 120 Vin = 1.0 mVrms fC = 45.75 MHz TA = 25C 80
40
Minimum Operating Voltage Range 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0
1.0
2.0
3.0
4.0
5.0
0
VOLUME CONTROL VOLTAGE (V)
VCC, SUPPLY VOLTAGE (V)
MOTOROLA ANALOG IC DEVICE DATA
7
MC44302A
Figure 19. Representative Block Diagram
VCC
VCC Sound Quadrature Coil (FM) VCC VCC AFT Switch AFT Output PLL Filter (Main VCO Loop) VCO Coil Sound AFT Filter/ Peak White Filter Sound De- Emphasis (FM) Sound Inputs (FM) (AM) 25 IF Input AFT Clamp 8 IF Amp 9 VCC Limiter 90 Limiter 13 VCC 15 VCO Sweep Freq Doubler Control Logic AGC Control Circuit 0 Phase Shift 90 Video 1 Det Sound Q Det Gated AGC Audio Switch 1 90 Vol Control 27 Audio Output (Variable) VCC Volume Control Phase Detector VCO AFT Amp 12 11 19 20 21 7 4 26 2 23
FM AFT
FM IF & Detector
AM IF & Detector
Switch 1
Switch 2
Switch 3
Switch 4 24 Audio Output (Constant)
RF AGC Output
RF AGC Delay
Peak AGC
Acquisition Circuit
White Spot Inv Audio Input/ Audio-Video Switch
14 AGC Filter
AGC Discharge
Sync Sep
Horiz PLL OSC
Mode Switch
Video Invert Switch
3
17 Flyback/ Video Input
16
18
28
10
5 (Neg)
6 (Pos)
22 From External Audio Source
Gnd Lock Detector/ Filter (Acquisition Circuit) Video Outputs Intercarrier Sound Output VCC
Horizontal PLL Filter
PAL 1 Audio 2 PAL 2 SECAM Video Mode Switch
Audio 1
NTSC
Video 1
Video 2
This device contains 2,641 active transistors.
8
MOTOROLA ANALOG IC DEVICE DATA
MC44302A
FUNCTIONAL DESCRIPTION
Introduction The MC44302A is an advanced high performance multistandard IF system specifically designed for use with all of the world's major television modulation techniques including NTSC, PAL, and SECAM. This device performs the function of intermediate frequency (IF) amplification, automatic gain control (AGC), automatic frequency tuning (AFT) and signal demodulation for transmitting systems that use either positive or negative amplitude modulated video along with frequency modulated (FM) or amplitude modulated (AM) sound. The television designer is offered a new level of circuit simplicity along with enhanced system performance when compared to present day television IF amplifiers. Numerous unique design techniques are incorporated resulting in only a single tuned circuit adjustment for a completely aligned video and sound IF system with tuner AFT output. Special design attention was given to enhance noise performance and to reduce differential gain and phase distortion. Additional internal circuitry is provided to meet the European Peritel socket requirements along with a means for descrambling video signals that use either or both amplitude modulated sync and alternate line video inversion. A detailed block diagram of the internal architecture is shown in Figure 19 and an operating description of the major circuit blocks is given below. IF Amplifier and AGC The IF amplifier consists of four cascaded ac coupled gain stages yielding an input sensitivity of 40 V for a full video output swing of 2.2 Vpp. This level of sensitivity allows the use of a single IF block filter without incurring the additional cost of a preamplifier. A quite acceptable level of signal to noise performance is achievable by utilizing a tuner with a gain of 33 dB to 36 dB combined with a low insertion loss (18 dB) surface acoustic wave (SAW) or passive block filter. The first three stages of the IF amplifier are gain controlled to provide an AGC range of 80 dB. This extended AGC range enhances the signal handling capability, resulting in superior differential phase and gain performance with a significant reduction of intermodulation products. AGC of the first stage is internally delayed so as to preserve the amplifier's low noise figure characteristics. An on-chip sync separator and horizontal phase-locked loop oscillator is provided for noise immune AGC gating in self contained applications where a horizontal scan signal may not be available. A positive going sync source connected to the Flyback/Video input at Pin 17 is used to lock the PLL and generate an internal AGC keying pulse. The sync separator allows direct use of the Negative Video output at Pin 5 as a source for the keying pulse. If horizontal scan circuitry is available, a positive going flyback pulse can also be used to set the keying pulse. A video signal and a reference level are required to implement automatic gain control of the lF and tuner. The video AGC reference is selected for a specific modulation standard by the Video Mode Switch voltage setting at Pin 10; refer to Table 2. With PAL 1, PAL 2, or NTSC mode selected, a black level reference is established by AGC keying during the tip of sync. With SECAM mode selected, a black level reference is established by AGC keying during the back porch. In order to correct for the inconsistent back porch level that is common between SECAM transmitters, a long time constant non-keyed peak white reference level is also established, and is used in conjunction with the black level reference to control the video output level. The peak white level is used in effect to slowly readjust the black level reference threshold over a limited range of 10%. With this dual reference approach, the accuracy associated with a typical peak white detecting system is maintained without the usual sacrifice of speed, thus allowing a quick AGC response to airplane flutter and channel changes. The tuner AGC control function consists of an RF AGC delay adjustment at Pin 15 and an RF AGC output at Pin 13. The delay adjustment sets the threshold where tuner gain reduction is to begin. This usually corresponds to a signal level of 1.0 mV to 2.0 mV at antenna input. The AGC output is designed to control a reverse AGC type of tuner. As the antenna signal level increases, the voltage at Pin 13 decreases, causing a gain reduction in the tuner. Since Pin 13 is an NPN open collector output, an external pull-up resistor must be added if one is not provided in the tuner. Pin 13 is guaranteed to sink a minimum of 1.0 mA. Note that when operating with a tuner that requires in excess of 5.6 V, current will flow into Pin 13 due to conduction of the upper internal clamp diode. Carrier Regeneration Carrier regeneration is attained by the use of a phase-locked loop, thus enabling true synchronous demodulation to be achieved with all of its advantages. Following the IF amplifier and preceding the PLL phase detector is a limiting amplifier designed to remove the amplitude modulation that is present on the carrier. The amplifier consists of two cascaded differential stages with direct coupled feedback to set a closed loop gain of 40 dB. This two stage approach has several distinct advantages when compared to conventional integrated demodulators that utilize a single stage limiter. With a two stage limiter, the gain requirement to remove the video amplitude modulation can be designed-in without the large voltage swings that are required by a single stage limiter with equivalent gain. The large voltage swings lead to poor differential phase and gain performance, and consequently the need for an external tuned circuit with two cross coupled limiting diodes. Use of direct coupled feedback diminishes the effects of the amplifier's input offset voltage which can be an additional source for differential phase and gain errors. The combination of low voltage swing per stage with dc feedback eliminates the need for a tuned circuit at the output of the limiter. This results in a significant component and alignment cost savings as well as removing the necessity to pin out a high level IF signal. This high level signal is a potential radiation source that can result in IF instability at low signal levels. The only problem of using the two stage limiter is the potential for an additional static phase shift which will result in a change of the demodulating angles at both the video and sound demodulators inputs. This problem is solved by placing an identical two stage limiter between the frequency doubler output and the phase detector input. This adds an identical amount of static phase shift to bring the demodulating angles back to 0 and 90.
MOTOROLA ANALOG IC DEVICE DATA
9
MC44302A
Figure 20. Phase Detector
VCC Q1 1.0 MHz Square Wave SW1 Q2 SW2
VCO I + I I - I I - I I + I 1.0 MHz Square Wave SW3 Q3 Q4 2I
PLL 19 Filter
IF Carrier Signal (Limited) Regenerated Carrier (Limited)
Phase errors, resulting in quadrature video distortion, can also be caused by dc errors in the phase detector and AFT amplifier. Most of the dc offsets are caused by mismatches in the current mirrors of the push-pull output stage, refer to Figure 20. Switches SW1, SW2, and SW3 are driven by a 1.0 MHz square wave with an accurate 1:1 mark/space ratio. Switches SW1 and SW2 maintain the same sense of error signal, while SW2 ensures errors due to the top PNP current mirrors average to zero on the external loop filter capacitor. In a similar way, SW3 by interchanging Q3 and Q4, cancels errors due to the bottom NPN mirror. With phase errors reduced to a minimum, there is no need for any external phase adjustments. The phase detector output is filtered and it is used to control the VCO in a corrective manner. When the PLL establishes a locked condition, there will be a 90 phase shift between the two phase detector inputs. The Voltage Controlled Oscillator and Frequency Doubler circuits are shown in Figure 21. The oscillator operates at one half of the picture carrier frequency and is tuned by a control bias that is applied to the reactance stage input. Reactance tuning allows a higher Q to be maintained in the
tank circuit as opposed to a phase shift type of oscillator with the same tuning range. The oscillator frequency is internally doubled to picture carrier frequency by a balanced multiplier. Note that the multiplier input signals are at 90 to each other for frequency doubling. Since the oscillator operates at one half of the picture carrier frequency, radiation from the external tuned circuit components will not desensitize the system, even if picked up by the amplifier input leads. This significantly reduces the possibility of a PLL push-off condition. Running the oscillator at twice the picture carrier and dividing it down is another way of solving the IF input radiation problem, but there are two significant disadvantages. First and foremost, radiation into the antenna now becomes a problem. In the U.S.A. twice the picture carrier falls directly into the passband of channel 6, producing a very noticeable beat. Any second order harmonics, four times picture carrier, will fall into the passband of channel 8. Second, it is more difficult to produce a stable oscillator that operates at twice the IF frequency than one that operates at one half of the IF frequency.
Figure 21. VCO and Frequency Doubler
VCC
20 4.7 k
21 PLL Limiter for Video/Sound Demodulations (f = Pix Carrier)
Control Bias
Bias
Reactance Tuning Stage
Oscillator (fOSC = 0.5 Pix Carrier)
Frequency Doubler Balanced Multiplier
10
MOTOROLA ANALOG IC DEVICE DATA
MC44302A
Video and Sound Intercarrier Demodulation To ensure that the above performance improvements were not lost elsewhere, great care was taken with the design of the video demodulator and video amplifiers. One example is in the architectural placement of the phase shift amplifier (Figure 22) that is required for video demodulation. This amplifier was placed in series with the IF signal side of the demodulator, instead of the oscillator side as is common practice. The 90 phase shift is obtained by a capacitively coupling each of the differential amplifier driver emitters to the video demodulator inputs. This results in an output current that is at 90 with respect to the input voltage over a wide range of frequencies. Small phase errors that are caused by the transistor dynamic small-signal emitter resistance are corrected with the use of cross-coupled emitter resistors. This arrangement leads to a simpler design with the ability to tailor the demodulation angle for the lowest possible distortion at the IF/demodulator interface. The dynamic emitter resistances, which can give rise to distortion, are now in quadrature with the capacitive reactance and therefore contribute very little to the resultant output. After the PLL attains phase-lock, video and sound demodulation is obtained by the use of two separate double balanced multipliers. Video demodulation is accomplished by multiplying the non-limited 90 phase shifted carrier signal, with the regenerated vision carrier that is obtained from the Frequency Doubler output. Both positive and negative video outputs are produced. The phase relationship between the video demodulator inputs is 0 since the carrier signal is phase shifted 90. This is done in order to cancel out the 90 phase shift that is present at the inputs of the Phase Detector when it is locked. The sound intercarrier signal is also recovered by a multiplier in a similar manner to that of the video. In this case the carrier signal is not phase shifted, and the phase relationship between the sound demodulator inputs is 90. A consequence of this phase relationship is that only the higher frequency video components are demodulated while the lower frequency components, those that fall within the vestigial sideband, are suppressed. With negative polarity modulation systems, a significant reduction in the level of white character sound buzz and hum is achieved. This is most noticeable when demodulating video signals that contain a high luma level which can cause the modulation index to exceed 100 percent. Figure 22. 90 Phase Shift Amplifier
+ Iout Vref +Vin -Vin Iout +
both positive and negative polarities of video modulation. The positive video output appears at Pin 6 and is intended to drive the luma and chroma channels. This output contains a White Spot Inverter that is used to invert and clamp any demodulated noise that is significantly above the white level. This effectively removes the whiter than white noise produced by the true synchronous demodulator and prevents the CRT from being overdriven and defocused. The white spot inversion threshold and clamp levels are set to approximately 4.0 V and 2.5 V respectively. The negative video output appears at Pin 5 and is intended to be used as a sync separator source. With a simple preseparator low pass noise filter, this output will provide optimum sync performance. The video outputs are designed to drive a resistive load that is in the range of 2.0 k. Lower resistance values could increase differential phase and gain distortion. Figure 23. Positive Video Output with White Spot Inversion
White Spot Inversion Threshold 4.0 V 3.7 V Normal 0% and 100% Carrier Levels
2.5 V
1.2 V White Spot Clamp Level
Video Outputs Each of the video outputs are part of a wide bandwidth operational amplifier with internal dc feedback and frequency compensation. The AGC reference provides the same composite video output level of approximately 2.2 Vpp for
AM & FM Sound IF and Detection The intercarrier sound that is present at Pin 28 normally connects through a ceramic bandpass filter to either the FM IF and Detector input at Pin 2, or the AM IF and Detector input at Pin 23. With the FM IF, intercarrier sound is limited by a five stage ac coupled amplifier yielding high sensitivity and a high level of AM rejection. The typical limiting threshold is 80 V, and the AM rejection ratio is in excess of 50 dB. FM detection is accomplished by a self tuning quadrature demodulator. An internal reactance stage with phase compensation is controlled to automatically adjust the tuning of an external tank circuit eliminating the need for manual alignment. The tank is a parallel circuit consisting of a fixed value inductor, capacitor, and resistor. The tuning range is controlled by the ratio of the internal capacitance change to that of the fixed external tank capacitance. The internal capacitance is controlled by the voltage present on the Sound AFT Filter, Pin 7. The capacitance ranges from 0.25 pF to 19 pF, refer to Figure 9. Figure 10 shows the self tuning frequency range for three inductor values. In general, for fixed frequency applications, the external tank capacitance should be in the range of 56 pF to 82 pF. This should allow sufficient tuning range to account for the component tolerances. The L-C values should be selected so that the AFT filter operates below 2.4 V when properly tuned to the sound intercarrier. This yields the best low signal lock-in performance, since the AFT filter voltage approaches 1.0 V under no signal conditions. Multi-standard applications that require a wide intercarrier tuning range can be accomplished by using a small external capacitance with a
MOTOROLA ANALOG IC DEVICE DATA
11
MC44302A
large inductance. Parasitic layout and coil capacitance must be considered for optimum performance. Suggested component values are given in Table 3. The sound AFT time constant is set by an external capacitor that is connected from Pin 7 to ground. This capacitor is driven by an internal 300 A current source and sink. The demodulated sound bandwidth is in excess of 100 kHz making this device well suited for MTS (multi-channel television sound) stereo and SAP (second audio program) TV applications. Sound de-emphasis is controlled by the time constant of an internal 18 k resistor and an external capacitor that is connected from Pin 4 to ground. The FM IF is active in PAL 1, PAL 2 and NTSC modes, and provides 2.0 Vpp of audio at the Variable and Constant outputs. With the AM IF, intercarrier sound is amplified and detected by a fully balanced exalted carrier demodulator. The detector provides in excess of 2.0 Vpp recovered audio output at Pin 24. An internal low pass filter is incorporated to suppress any high frequency harmonics that may be present at the demodulator output. The AM IF is active in both the SECAM and NTSC modes. Audio Input/ Audio-Video Switch The Audio Input/Audio-Video Switch is a multifunction input that selects the source for the audio that appears at Pin 27, and the polarity of the video that appears at Pins 5 and 6. There are four possible modes for this input and they are each selected by applying a specific dc voltage level to Pin 3. Refer to Table 1 and to the circuit description for Pin 3 in Table 3. Audio 1 is intended for applications where internally demodulated audio is present at the Variable and Constant outputs. The Variable output can be used internal to the TV chassis and the Constant output can be connected to a jack for earphone or recorder use. Audio 1 is selected by not having a dc path from Pin 3 to ground. Internally demodulated audio (AM or FM) will appear at Pins 24 and 27, negative video at Pin 5, and positive video at Pin 6. If there is an ac coupled audio source present at Pin 3, it will be internally disconnected. Audio 2 is intended for European applications where internal and external audio sources must be routed through the Peritel socket. Internally demodulated audio present at the Constant output can be routed out the Peritel socket while external audio can be routed in, ac coupled to Pin 3, and level adjusted at Pin 1 for use within the TV chassis. Audio 2 is selected by connecting a 22 k resistor from Pin 3 to ground. Internally demodulated audio (AM or FM) appears at Pin 24, negative video at Pin 5, positive video at Pin 6, and the ac coupled external audio source at Pin 3 appears at Pin 27 inverted. The audio level into Pin 3 must be limited so that the selected mode of operation is not changed during the peak excursions with Audio 2 selected, and the valley excursion with Audio 1 selected. With the component values shown in Table 3, the audio level should be limited to less than 1.1 Vrms. Video 1 and 2 modes provide a simple means to recover scrambled video in systems that use some form of alternate line video inversion. Descrambling is accomplished by switching between the two video modes. Video 1 is selected by connecting a 3.3 k resistor from Pin 3 to ground. Internally demodulated audio (AM or FM) will appear at Pins 24 and 27, negative video at Pin 5, and positive video at Pin 6. Video 2 is enabled when Pin 3 is grounded, usually by an IC or a transistor that is gated on alternate or multiple lines. Internally demodulated audio (AM or FM) appears at Pins 24 and 27, positive video with white spot inversion at Pin 5, and negative video at Pin 6. Note that Video 1 mode is identical to Audio 1. Video 1 is provided so that when descrambling, Pin 3 does not have to pass through the voltage range that selects Audio 2. This prevents unwanted switching noise and buzz from appearing at the audio outputs. It should be noted that when combining the features of Pin 3 with the Peritel socket, the TV chassis can provide the audio and video source to drive an external monitor or video recorder. Also an externally generated audio and video source can be used to drive the TV chassis as a monitor. DC Volume Control The dc volume control consists of an electronically controlled audio amplifier that has a range of 12 dB gain, to 60 dB attenuation. The audio output level is set by applying a control voltage to Pin 1. This can be derived from an electronic source such as a digital to analog converter, or a manual source such as the wiper of a potentiometer that is connected from VCC to ground. The potentiometer should be 20 k or less. Because no audio signal is present on Pin 1, any potential for hum and noise pickup can easily be bypassed by connecting a capacitor from this pin to ground. In most cases, an unshielded wire or printed circuit board trace is all that is required to connect the variable voltage source to the IF board.
12
MOTOROLA ANALOG IC DEVICE DATA
MC44302A
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Table 1. Audio Input/Audio-Video Switch
Inputs to Pin 3 Outputs Audio1 Video Mode AC Signal External Audio External Audio - DC Level (VCC = 5.0 V) Open or 3.4 V to 5.0 V Constant Pin 24 Variable2 Pin 27 Negative Pin 5 Positive Pin 6 Audio 1 Internal Audio (AM or FM) Internal Audio (AM or FM) Internal Audio (AM or FM) Internal Audio (AM or FM) Internal Audio (AM or FM) Negative Video Positive Video with White Spot Inversion Positive Video with White Spot Inversion Positive Video with White Spot Inversion Negative Video Audio 2 22 k to Ground or 1.8 V to 2.2 V External Audio Negative Video Video 1 3.3 k to Ground or 0.6 V to 0.9 V Grounded or 0 V to 0.03 V Internal Audio (AM or FM) Internal Audio (AM or FM) Negative Video Video 2 - Positive Video with White Spot Inversion
NOTES: 1. Refer to Table 2 to determine the active demodulator (AM and or FM) and the associated audio output pins. 2. The Variable output audio level is controlled by Pin 1.
Table 2. Television Standard Modes
AGC
Television Standard
Mode Selection
Sound
System S PAL 1 PAL 2
Video Modulation Polarity Negative Negative Positive
Pin 10 Voltage (V)
Pin 16 DC Loading Open Open Open
Reference and Method
Time Constant Pin # 14 14 14 7
IF and Modulation
Active FM FM
Inhibited AM AM FM
Audio Output Pin # 24, FM 27, FM 24, FM 27, FM
4.0 to 5.0 3.2 to 4.0 1.9 to 3.0
Black Level Sync Tip Keyed Black Level Sync Tip Keyed
SECAM
Black Level Back Porch Keyed White Level Peak Detected Video Black Level Sync Tip Keyed
AM
24, AM 27, AM
NTSC
Negative
Ground
Open
14
AM & FM
-
24, AM 27, FM
Multi-Standard Operating Modes The MC44302A is designed to operate properly with PAL (B, G, I,) SECAM (L), and NTSC (M) television transmission standards. There are two multifunction inputs that are used to select the proper control methods for video demodulation, sound intercarrier demodulation, and AGC. This keeps the sense of the video signal at the outputs the same, whether positive or negative modulation is being received. Refer to Table 2 and the following operating description. The PAL, NTSC, and SECAM standard are each selected by applying a specific dc voltage level to the Video Mode Switch at Pin 10. With PAL 1 selected, AGC is keyed on the sync pulse by the horizontal PLL which is locked to the flyback or video sync pulse present at Pin 17. The FM sound IF and detector is active with the demodulated audio appearing at Pins 24 and 27. The PAL 2 selection is identical to PAL 1 with the addition of sound muting when the Acquisition Circuit is unlocked or vertical sync is absent. With SECAM selected, the video level is established by both, a
long time constant peak white detector, and a back porch keyed AGC that corrects for transmitted black level errors while maintaining fast AGC response. The AM sound detector is active with the demodulated audio appearing at Pins 24 and 27. With NTSC selected, AGC and sound muting is the same as for PAL 1 mode. The FM and AM detectors are both active with the FM output at Pin 27 and the AM output at Pin 24. The AM output can be used to obtain the sync signal, in suppressed sync scrambling systems, that is amplitude modulated on the sound carrier. Signal Acquisition and AFT The automatic fine tuning (AFT) portion of this integrated circuit is unconventional in form. AFT control is derived by amplifying the phase detector error voltage and applying it to the tuner local oscillator (LO) after phase lock is established. This method eliminates the need for a discriminator coil along with the associated alignment, and the potential for IF instability due to coil radiation.
MOTOROLA ANALOG IC DEVICE DATA
13
MC44302A
The MC44302A is unique in that it uses the VCO loop as a frequency reference for the tuner AFT loop. After signal acquisition and phase lock, the VCO and AFT loops will reach a steady state condition. The VCO will have moved only a small amount from it's nominal frequency (fVCO) with the tuner local oscillator (fLO) correcting for the majority of the frequency error (fe). Therefore in steady state condition fe = fVCO + fLO, and fLO >> fVCO. This is due to the much higher gain in the tuner LO loop when compared to that of the VCO loop. In this way, the VCO can be used as the frequency reference for the AFT system provided that the PLL can be initially locked to the incoming IF signal. This combination of the tuner LO loop and the VCO loop forms a double loop PLL system. Analysis shows that the overall system stability can be assured by treating the VCO loop as a single stand alone PLL. This is valid if the VCO loop has low gain and high bandwidth which guarantees initial capture, while the tuner LO loop has high gain and low bandwidth which minimizes frequency and phase offsets. The AFT system is designed to acquire the vision carrier, without false locking to the sound or adjacent sound carriers, with an initial tuner LO frequency error of 2.0 MHz. This error is reduced to less than 10 kHz upon establishing acquisition and after both the VCO loop and tuner AFT loop have reached their steady state condition. In contrast, the discriminator coil type of AFT has a highly asymmetric lock characteristics with a frequency error in the range of about -2.0 MHz to 1.0 MHz. This large frequency error is due to the effects of lower loop gain combined with the IF filter slope. Higher loop gain can be incorporated into the discriminator coil type of AFT but circuit problems due to large dc offsets, and IF stability due to coil radiation at the picture carrier frequency can be difficult to resolve. In order to achieve a high performance level, without encountering the ill effects associated with high gain discriminator circuits, a novel approach to establishing PLL lock up was developed. Figures 24 and 25 graphically illustrate the Acquisition Circuit operation. In the absence of an IF signal, the Acquisition Circuit examines the state of the Video (I) and Sound (Q) demodulators, detecting that the VCO is out of lock. On loss of lock, the AFT Output at Pin 11 (tuner LO drive) is clamped, and the Lock Detector output at Pin 18 is placed in a sink mode, causing its filter capacitor to discharge. As the capacitor voltage falls below 3.7 V, the application of a VCO offset starts and is completed at 3.0 V. The capacitor voltage will continue to fall stopping at 2.7 V until the Acquisition Circuit detects a signal. At this point both the tuner and IF are offset by the same amount from their nominal frequency of 45.75 MHz. Thus a picture carrier would now be converted to 43.75 MHz and the Main VCO Loop voltage at Pin 19 would be centered within its dynamic range at 3.2 V. The AFT offset is controlled by the system designer to approximately -2.0 MHz. This is done so that if a nominal IF signal appeared, its picture carrier would be centered in the IF filter passband where there is minimum attenuation. Note that even if the tuner LO drifts by as much as 2.0 MHz, the signal will still not be significantly attenuated. On the arrival of a signal, beat notes are detected at the output of the demodulators, and the Lock Detector output is again placed in a sink mode to further discharge the filter capacitor. When the capacitor voltage falls below 1.3 V, the VCO Sweep is initiated at Pin 19. This causes the VCO to be swept an additional -2.0 MHz from its out of lock nominal centered IF frequency. During this negative sweep, the PLL Phase Detector is inhibited so that a phase lock cannot be obtained. When the capacitor voltage at Pin 19 falls to 2.0 V, the Phase Detector is made active and the VCO is swept in a positive direction from -2.0 MHz to 2.0 MHz of the out of lock centered IF frequency. The PLL will therefore lock to the first carrier it encounters. This in fact has to be a vision carrier since the sound carrier is more than 2.0 MHz below the nominal frequency, and the adjacent lower channel sound carrier is higher than the vision carrier. PLL lock can occur at any point during the positive going sweep of Pin 19 from 2.0 V to 4.2 V. On achieving lock, the Lock Detector output is released allowing the voltage across the filter capacitor to rise. When this voltage reaches 3.0 V, a gradual removal of the VCO offset starts. At 3.7 V removal is completed, the VCO Sweep circuit is inhibited, and the AFT clamp is removed. The phase detector remains permanently enabled. Upon removal of the AFT Clamp, the error voltage that appears at the AFT Amplifier output will drive the incoming signal towards the nominal IF frequency of 45.75 MHz. The Main VCO Loop will track the incoming IF signal while maintaining phase and frequency lock as the loops settle. This is attainable because the tuner AFT loop response is slow while the Main VCO loop is fast. For large frequency errors during this period, the slew rate of the tuner LO loop is automatically increased but not to the extent where it would cause a VCO tracking problem. This technique allows the acquisition time of the circuit to be reduced considerably while still using a larger than normal time constant in the tuner LO loop. In this way, any possibility of phase modulating the LO with video is removed. The amount of AFT offset is controlled by the output swing of Pin 11, the voltage to frequency sensitivity of the tuner's AFT input, voltage gain or attenuation of any interface level shifting circuitry, and the alignment accuracy of the VCO coil. The amount of VCO offset and VCO sweep is controlled by the change in capacitance ratio of the internal tuning capacitance to that of the fixed external tank capacitors C19 and C20. To insure proper PLL lock, it is recommended that the VCO sweep is limited to less than 5.0 MHz and that C19 and C20 are not be less than 33 pF.
14
MOTOROLA ANALOG IC DEVICE DATA
MC44302A
Figure 24. Acquisition Circuit Operation
Typical IF Bandpass Filter Response 39.75 41.25 Adjacent 41.75 Pix Trap Adjacent Upper Channel Snd Adjacent Upper Channel Snd Pix Snd Pix Snd Desired Channel Pix Snd Carried Detected Phase Detector Inhibited Phase Detector Active Adjacent Upper Channel Snd Pix Snd Adjacent Upper Channel Snd Pix Snd Desired Channel Pix Snd Desired Channel Pix Snd Adjacent Lower Channel Pix Adjacent Lower Channel Pix 2.0 MHz mistuning of the Desired Channel with an initial 2.0 MHz offset. 43.75 45.75 47.25 Adjacent Snd Trap Adjacent Lower Channel Pix Snd Adjacent Lower Channel Pix When a beat note is detected, the VCO is swept another 2.0 MHz low with the phase detector is inhibited. The VCO is then swept high with the phase detector enabled. Upon phase lock, the AFT clamp is removed, the initial VCO offset is slowly released, and the VCO Sweep is inhibited. Capture of the desired picture carrier is assured even if mistuned 2.0 MHz. -2.0 MHz mistuning of the Desired Channel with an initial 2.0 MHz offset. Properly Tuned Desired Channel Pix Initial 2.0 MHz VCO with the AFT clamped. Note that if the Desired Channel picture carrier appears, it will be centered in the IF passband.
Desired Channel
It must be noted that in the operating description of this device, any reference made to the amount of VCO offset or sweep is the actual effect on the IF passband. The true VCO frequency change is only one half of that stated due to the Frequency Doubler circuit. The AFT system is designed to control all types of varactor tuned local oscillators via the AFT Mode Switch input at Pin 12. This input is used to activate the output of the AFT control amplifier that appears at Pin 11, and to select the control voltage polarity versus IF frequency. With the AFT Mode Switch input connected to VCC, Pin 11 is placed in a sourcing mode when the IF carrier frequency is below
nominal. With the AFT Mode Switch input grounded, Pin 11 is placed in a sinking mode when the IF carrier frequency is below nominal. With the AFT Mode Switch input disconnected, Pin 11 is internally clamped to one half of VCC, refer to Figures 6 and 25. Under this condition the TV set can be tuned manually and appear to have a conventional type of AFT with a smooth capture characteristic. Most other PLL AFT systems cannot be manually tuned in this manner as they tend to exhibit an undesirable abrupt capture characteristic. Digital phase-locked loop tuning systems can also be controlled with the addition of a varactor diode used to shift the PLL reference oscillator.
MOTOROLA ANALOG IC DEVICE DATA
15
MC44302A
Figure 25. Acquisition Circuit Timing
4.2 V PLL Lock PLL Filters (Main VCO Loop) Pin 19 fIF High fIF Nominal VCO Sweep Initiated 2.0 V Signal No Signal VCO Offset Application Start 3.7 V Completed Lock Detector/Filter (Acquisition Circuit) Pin 18 3.0 V 2.7 V Signal Detection Start VCO Sweep Inhibited VCO Offset Removal Completed Signal
3.2 V
4.3 V
1.3 V 0.8 V Phase Detector Active Phase Detector Inhibited Pin 12 = Gnd Final Static Condition Phase Detector Active
4.5 V
AFT Output Pin 11
2.5 V
Pin 12 = Open
0.5 V AFT Static
Pin 12 = VCC AFT Clamped AFT Correcting AFT Static
In order to make the above drawing easier to comprehend, the vertical voltage axis was drawn to scale but the horizontal time axis was not. The typical slewing time for each output with the component values shown in the application circuit is as follows: PLL Filter (Main VCO Loop) Pin 19 - 3.5 ms total sweep time when discharging down from 4.2 V to 2.0 V and charging back up to 4.2 V. Lock Detector/Filter (Acquisition Circuit) Pin 18 - 4.0 ms when slewing up from 0.8 V to 4.3 V. AFT Output Pin 11 - 12 ms when slewing from 4.5 V or 0.5 V to the final static condition of 2.5 V.
16
MOTOROLA ANALOG IC DEVICE DATA
MC44302A
Figure 26. Alignment Configuration
CW Picture Carrier V RF Amp Tuner Mixer Local OSC 2.5 V VCC AFT Switch 25 AFT Clamp Bandpass Filter 8 9 IF Amp Limiter 12 11 AFT Amp Phase Detector Limiter VCO Sweep VCO 19 20 21 8.2 k VCC VCC
VCO Coil
Frequency Counter
Freq Doubler
Alignment Tuning of a single coil is all that is required for complete alignment of the IF amplifier. This is most easily accomplished with the test set-up shown in Figure 26. The tuner is set to a given channel and a CW signal that is precisely set to the picture carrier frequency of that channel, is connected to the tuner RF input. The dc power supply is adjusted until the tuner output, measured by the frequency counter, is equal to the required IF picture carrier (45.75 MHz in the USA). The VCO coil is then adjusted so that the voltage across the 8.2 k resistor approaches zero. A voltage level of less than 5.0 mV should be easy to attain. The RF signal and the dc supply are removed and alignment is completed. The tuning system should be designed so that the required varactor bias is approximately 2.5 V when phase-locked to the nominal IF signal. This centers the AFT amplifier's current source/sink output, Pin 11, yielding the maximum compliance voltage for optimum hold-in and pull-in characteristics. When interfacing Pin 11 with the tuning system's control bias, the output current must not exceed 4.0 mA. This current can be limited with the addition of a series output resistor if the AFT amplifier is required to drive a low resistance load. Differential Phase and Sound Buzz Even with all the care taken in this design, some residual differential phase still remains. Although small, refer to Figure 8, it results in an output on the phase detector that modulates the VCO and the sound intercarrier. This in turn has the potential of degrading the stereo sound performance. In addition, there is a quadrature differential phase shift that is produced by the shape of the IF bandpass filter. Both produce currents in the output of the phase detector which in turn phase modulates the VCO. This phase modulation is imposed on the sound intercarrier resulting in a video related sound buzz. These currents can be canceled by injecting the correct amplitude and phase of demodulated video into the
PLL filter. This can be accomplished with the addition of the differential phase correction circuit shown in Figure 27. The phase detector current that is due to the in-phase differential gain is canceled by the resistor current, and the quadrature component that is induced by the IF filter is canceled by the capacitor current. With proper adjustment, the differential phase distortion can be reduced to less than 0.5 degrees as well as eliminating any perceptible sound buzz. The source for the demodulated video to be injected into the PLL filter can be obtained from Pins 5 or 6. This must be determined experimentally for a given printed circuit board layout in order to obtain the best results. With the use of the correction circuit, this system achieves a similar level of performance to that of a parallel sound IF system. Electrostatic Protection Most pins on the IC have electrostatic protection diodes to VCC and ground. It is therefore imperative that no pin is taken below ground or above VCC by more than one diode drop, approximately 0.6 V, without current limiting. Figure 27. Differential Phase Correction Circuit
From Negative Video Output Pin 5 or Positive Video Output Pin 6
500 k 5.0-25 pF 82 k 0.1
To PLL Filter (Main VCO Loop) Pin 19
MOTOROLA ANALOG IC DEVICE DATA
17
MC44302A
PIN FUNCTION DESCRIPTION
Pin No. 1 VCC Equivalent Internal Circuit VCC VCC 1 0.01 10 k Volume Control Description DC Volume Control A potentiometer of 20 k or less, connected as shown, is used to adjust the audio output level at Pin 27. There is no audio signal present at this pin, allowing the use of unshielded wire between the IF board and the potentiometer. To prevent hum and noise pickup, a bypass capacitor connects from this pin to ground. Refer to Figure 17. Sound Input (FM) This pin is the input of the FM IF. The intercarrier sound output at Pin 28 connects to this input through a ceramic bandpass filter. The FM detector is active in PAL 1, PAL 2, and NTSC modes. Refer to Table 2.
2
From Ceramic Sound IF Filter at Pin 28
2
Sound Input (FM) VCC
VCC
2.2 k
3
VCC Audio Input/ Audio-Video Switch V 3 From External 0.1 Audio Source 27 k Audio 1 Audio 2 Video 1 22 k Video 2 3.3 k
15.5 k
Audio Input/Audio-Video Switch This is a multifunction input that selects the audio source that appears at Pin 27, and the video polarity at Pins 5 and 6. Audio 1 is without a dc path from Pin 3 to ground. Internally demodulated audio (AM of FM) appears at Pins 24 and 27, negative video at Pin 5, and positive video at Pin 6. The audio source at Pin 3 is internally disconnected. Audio 2 is with the 22 k resistor connected. Internally demodulated audio (AM or FM) appears at Pin 24, negative video at Pin 5, positive video at Pin 6, and the audio source at Pin 3 appears at Pin 27. Video 1 is with the 3.3 k resistor connected. Internally demodulated audio (AM or FM) appears at Pins 24 and 27, negative video at Pin 5, and positive video at Pin 6. Video 2 is with Pin 3 grounded. Internally demodulated audio (AM of FM) appears at Pins 24 and 27, positive video at Pin 5, and negative video at Pin 6. Refer to Table 1. Sound De-Emphasis (FM) A capacitor is connected from this pin to ground. It is used in conjunction with internal 18 k resistor to set the FM sound de-emphasis time constant. The typical de-emphasis time constant required for a flat audio response is 75 s in the United States and 50 s in Europe. The FM sound detector frequency response for different de-emphasis capacitor values is shown in Figure 12.
4
C4 0.0033 VCC
4
Sound De-Emphasis (FM)
100 A 18 k
VCC
200 A
18
MOTOROLA ANALOG IC DEVICE DATA
MC44302A
PIN FUNCTION DESCRIPTION (continued)
Pin No. 5 Equivalent Internal Circuit VCC VCC 60 1.0 mA Description Negative Video Output Negative going video appears at this output and it is intended to drive a sync separator. Positive going video will appear at this output when Pin 3 is grounded. This feature provides a simple means for descrambling the video signal in systems that use alternate line video inversion. Refer to the description of Pin 3. The video output is designed to drive a resistive load that is in the range of 2.0 k. Lower resistance values will tend to increase output distortion. 6 2.0 k 1.2 6 VCC VCC 60 1.0 mA Positive Video Output Positive going video appears at this output and is intended to drive the luma and chroma channels. Negative going video will appear at this output when Pin 3 is grounded. This feature provides a simple means for descrambling the video signal in systems that use alternate line video inversion. Refer to the description of Pin 3. The positive going video signal always contains white spot inversion whether it appears at output Pins 5 or 6. The video output is designed to drive a resistive load that is in the range of 2.0 k. Lower resistance values could increase output distortion. 6 2.0 k 1.2 7 Sound AFT Filter/ Peak White Filter 10 VCC VCC VCC Sound AFT Filter/Peak White Filter A capacitor connected from this pin to ground is used to adjust the sound AFT time constant in PAL and NTSC modes, and video peak white AGC time constant in SECAM mode. The sound AFT filter voltage controls the internal tuning capacitance that is placed across the sound quadrature coil at Pin 26. Refer to Figure 9. 3.4 3.4
Negative Video Output
Positive Video Output
7
0 to 300 A PAL NTSC 8, 9 SECAM
VCC
3.4 k 8 Video IF Input
Video IF Input These pins are the inputs to the video IF amplifier. The amplifier consists of four ac coupled stages with an input sensitivity of 40 V for a 2.2 Vpp video output swing. This sensitivity eliminates the need for a preamplifier when used with suitable surface acoustic waves or passive block filters. The IF block filter must be located close to the IC package inputs to prevent unwanted pickup and possible instability problems. The input lead lengths must be kept short with a symmetrical printed circuit board layout.
9
MOTOROLA ANALOG IC DEVICE DATA
19
MC44302A
PIN FUNCTION DESCRIPTION (continued)
Pin No. 10 Equivalent Internal Circuit VCC Description Video Mode Switch A dc voltage at this input selects the proper video AGC and sound demodulation technique for PAL, SECAM, and NTSC. With PAL 1 selected, AGC is keyed on the sync pulse by the horizontal PLL which is locked to the flyback or video sync pulse present at Pin 17. The FM sound IF and detector is active. The PAL 2 selection is identical to PAL 1 with the addition of sound muting when the acquisition circuit is unlocked or vertical sync is absent. With SECAM selected, the video level is established by both, a long time constant peak white detector, and a back porch keyed AGC that corrects for transmitted black level errors while maintaining fast AGC response. The AM sound detector is active. With NTSC selected, AGC and sound muting is the same as in PAL 1 mode. The FM and AM detectors are both active with the FM output at Pin 27 and the AM output at Pin 24. Refer to Table 2.
V2 V1
VCC 3.0 k 2.4 k 5.1 k PAL 1 PAL 2 SECAM NTSC
10
Video Mode Switch
11 AFT Ouput 11 VCC VCC 0 to 500 A or 2.0 mA 20 Digital Slew Rate Control 12 VCC 3.3
To Tuner AFT Input. IO must be externally limited < 4.0 mA.
Variable Reference Clamp Voltage
AFT Output With detent type tuners, the automatic fine tuning output can be used to directly control the tuner local oscillator varactor. The varactor control input must be high impedance in order to maintain high AFT loop gain with acceptable dynamic response. This output has a linear sink and source current range of 0 to 500 A, and is digitally switched to 2.0 mA for large frequency errors. The capacitor from Pin 11 to ground limits the bandwidth of the tuner local oscillator loop. Digital phase-locked loop tuning systems can also be controlled with the addition of a varactor diode used to shift the PLL reference oscillator. Refer to Figures 6, 24, and 25.
12
AFT Mode Switch VCC VCC 24 k
AFT Mode Switch This input is used to activate the output of the AFT control amplifier that appears at Pin 11, and to select the control voltage polarity versus IF frequency. This feature allows the AFT output to work with all types of varactor tuned local oscillators. With the AFT Mode Switch input connected to VCC, Pin 11 is placed in a sourcing mode when the IF carrier frequency is below nominal. With the AFT Mode Switch input grounded, Pin 11 is placed in a sinking mode when the IF carrier frequency is below nominal. With the AFT Mode Switch input disconnected, Pin 11 is internally clamped to one half of VCC, refer to Figures 6 and 25.
5.1 k
24 k
13
VCC 10 k To Tuner AGC Input 13 RF AGC Output
VCC
VCC
RF AGC Output This output is designed to control a reverse AGC tuner. As the antenna signal level increases, the voltage at Pin 13 decreases, causing a gain reduction in the tuner RF stage. An external pull-up resistor must be added if one is not provided in the tuner. Pin 13 is guaranteed to sink a minimum of 1.0 mA. Note that when operating with a tuner that requires in excess of 5.6 V, current will flow into Pin 13 due to conduction of the upper internal clamp diode.
20
MOTOROLA ANALOG IC DEVICE DATA
MC44302A
PIN FUNCTION DESCRIPTION (continued)
Pin No. 14 Equivalent Internal Circuit VCC Description Video IF AGC Filter A capacitor connects from this pin to ground to control the video IF AGC rate of change with respect to a change in input signal level. An increase in input signal level causes an increase in the voltage at Pin 14 which controls the internal AGC action. Pin 14 has an unsymmetrical source and sink current of 150 A and 8.0 A respectively. The AGC filter voltage versus IF differential input signal level is shown in Figure 1. 2.0 V Video IF VCC AGC Filter 14 0.1 Horizontal Gating
15 VCC 6.2 k 1.0 k 4.3 k RF AGC VCC Delay 15 0.01 Internal IF AGC
VCC
From Pin 14 AGC Filter Voltage
RF AGC Delay A voltage applied to this input sets the video IF signal level threshold before gain reduction of the tuner begins. The threshold setting is tuner dependent but is usually in the range of 1.0 mV to 2.0 mV of signal at the antenna. Too low of a setting will cause premature tuner gain reduction and a poor picture and sound signal to noise ratio, while too high of a setting will cause tuner overload and picture distortion. The IF differential input signal level versus RF AGC takeover threshold is shown in Figure 2.
16
VCC VCC 0.4 mA 0.4 mA
Horizontal PLL Filter
16
Horizontal PLL Filter This is a dual function pin. With the network shown, the horizontal phase-locked loop oscillator provides a keying pulse to properly gate the AGC when in PAL, SECAM, and NTSC modes. With Pin 16 grounded, both the AM and FM sound IF and detectors are inhibited. By placing Pin 3 in the Audio 2 mode, the variable audio output at Pin 27 is active and can be used to control the level of the externally processed digital sound. Refer to the description of Pin 3.
0.68 1.5 k 0.05
MOTOROLA ANALOG IC DEVICE DATA
21
MC44302A
PIN FUNCTION DESCRIPTION (continued)
Pin No. 17 Equivalent Internal Circuit VCC Description Flyback/Video Input This input connects to a positive going sync source to generate an internal AGC keying pulse. An internal sync separator is provided for use in stand alone applications where a horizontal scan signal is unavailable. The sync separator allows direct use of the negative video output at Pin 5 to set the internal keying pulse. If horizontal scan circuitry is available, a positive going flyback pulse can be used instead to set the keying pulse.
VCC
17
Flyback/Video Input 0.02 From Negative Video Output Pin 5
18
VCC 0 or 80 A
VCC
VCC 3.3 V 5.0 k
68 k
Lock Detector/Filter (Acquisition Circuit) A filter capacitor for the acquisition circuit lock detector connects from this pin to ground. The capacitor voltage will vary upon signal presence and lock condition. Typical voltages are 2.7 V with the circuit unlocked and without any signal, 0.8 V to 4.3 V during signal acquisition, and 4.3 V when locked. Refer to the Acquisition Circuit Timing in Figure 25.
Lock Detector/Filter (Acquisition Circuit) 19 PLL Filter (Main Loop) VCC 19
18 0.1 220 0.01 0.1 VCC VCC PLL Filter (Main VCO Loop) A filter capacitor for the main phase-locked loop circuit connects from this pin to ground. The typical capacitor voltage is 3.2 V when locked and the circuit has reached the final static condition. Refer to Figure 5 for the PLL filter voltage versus carrier frequency change, and to Figure 25 for the acquisition circuit timing. 3.9 V
0 to 160 A
22 k
20, 21
VCC 560 C20
L4 C19
VCO Coil
20 VCC
21
VCO Coil VCC 4.7 k 4.7 k
VCO Coil These are the voltage controlled oscillator pins. Symmetrical tuning about the VCO frequency is provided by a bifiliar wound coil that resonates at one half of the desired IF frequency. The coil must be placed close to the IC pins to prevent any unwanted pickup or radiation. The printed circuit board layout must have short symmetrical traces with adequate grounding for the can shield. Capacitors C19 and C20 should not be less than 33 pF. Suggested component values for the major IF frequencies are listed in Table 3.
22
MOTOROLA ANALOG IC DEVICE DATA
MC44302A
PIN FUNCTION DESCRIPTION (continued)
Pin No. 22 Gnd 23 Sound Input (AM) VCC 23 22 From Ceramic Sound IF Filter at Pin 28 VCC Equivalent Internal Circuit Description Gnd This pin is the internal circuit ground. Care must be taken with the printed circuit board layout to provide a continuous sea of copper around the IC. Sound Input (AM) This pin is the input of the AM IF. The intercarrier sound output at Pin 28 connects to this input through a ceramic bandpass filter. The AM detector is active in SECAM and NTSC modes. Refer to Table 2.
5.5 k
24
VCC 200 VCC Audio Output (Constant) 24 1.0 mA
Audio Output (Constant) This is the constant audio output. The audio source is controlled by the mode selection of Pin 3. Refer to the description of Pin 3, and to Tables 1 and 2.
25 330
5.0 V 0.01 VCC 25
VCC This pin is the positive supply of the video/sound IF IC. The IC is functional over a minimum range of 4.75 V to 5.5 V and requires 100 mA. Operation from higher input voltages is possible with a preregulator. For optimum performance, it is recommended that circuit board layout contains dual power supply bypass capacitors with short leads connected directly to the VCC pin and ground. Sound Quadrature Coil (FM) The sound quadrature tank components connect from this pin to VCC. The internal circuitry is designed to eliminate the time consuming alignment procedure by self tuning to the sound intercarrier frequency. This allows the use of economical fixed value components for a specific frequency or for a range of frequencies. The internal tuning capacitance that is placed across the tank ranges from 0.25 pF to 19 pF. Refer to Figures 9, 10, and Table 3 to select the proper component values for C25, R28, and L3.
26 C25
VCC R28 L3
Sound Quadrature Coil (FM) VCC VCC
26 VCC
Reactance Stage Representation
MOTOROLA ANALOG IC DEVICE DATA
23
MC44302A
PIN FUNCTION DESCRIPTION (continued)
Pin No. 27 Equivalent Internal Circuit VCC 200 VCC Audio Output (Variable) 1.0 mA 27 Description Audio Output (Variable) This is the variable audio output. The audio source is controlled by the mode selection of Pin 3, and audio level is controlled by a potentiometer connected to Pin 1. Refer to the description of Pin 3, Table 1, Table 2, and Figure 17.
28
VCC
VCC 60 1.0 mA
Intercarrier Sound Output This pin is the sound intercarrier output and is normally connected to either the AM or FM sound IF input through a bandpass filter. Because quadrature demodulation is used, the video level at this output is greatly suppressed.
Intercarrier 28 Sound Output 1.0 k 100 pF
0.001 2.0 k
To Sound Input Pin 2 for FM, Pin 23 for AM
Ceramic Bandpass Filter
24
MOTOROLA ANALOG IC DEVICE DATA
MC44302A
Figure 28. Printed Circuit Board Evaluation Circuit
SMB-1 Sound Intercarrier Output, Sound Input (FM) (AC Couple) RV1 10 k Volume J4 Audio Input R3 27 k TP3 R4 750 J6 C5 0.002 SMB-2 Video Output R31 0 R33 82 SW2 4 3 2 1 SW1 VCC 1 2 TP2 R15 2.7 k TP1 VCC RV3 R16 10 k 3.0 k R17 200 AFT Gain R18 8.2 k 3 2 R19 27 k 12 V 7 4 U2 MC33171 6 R12 R20 560 C11 0.01 C10 0.1 R13 1.0 k J13 J12 VCC 1 2 3 12 V R6 1.0 k Q1 2N4402 SMB-3 IF Input FL1 4 5 J11 10 C9 3.3 Video Mode Switch PLL Filter (Main VCO Loop) Lock Detector/Filter (Aquisition Circuit) Flyback/ Video Input Horizontal PLL Filter RF AGC Delay 19 18 C16 0.1 17 J18 16 J16 Video IF 14 AGC Filter J15 AFT Output to Tuner 15 C12 0.01 C15 0.022 J17 C18 0.01 J19 C8 L1 10 1.0 H R8 560 C3 0.1 SW4 1 J3 R2 22 k C4 0.0033 R5 1.0 k J8 7 8 9 Sound AFT Filter/ Peak White Filter Video IF Input Video IF Input Gnd VCO Coil VCO Coil 22 C20 21 20 C19 L4 R25 560 J20 R24 220 VCC C7 47 pF 3 J5 4 5 6 Sound De-Emphasis (FM) Negative Video Output Positive Video Output SW3 C27 C26 68 pF J27 R29 22 26 L3 25 24 R32 22 23 J22 C22 1.0 J23 C23 0.01 J24 C21 0.001 R26 2.0 k C25 C24 330 R28 J26 VS = 12 V R27 47 VCC J21 2 1
VCC C1 0.01 1 2 DC Volume Control Sound Input (FM) Audio Input/ Audio-Video Switch Intercarrier Sound Output Audio Output (Variable) Sound Quadrature Coil (FM) VCC Audio Output Constant) Sound Input (AM) 28 27
R30 1.0 k
D1 1N4733A 5.1 V
VCC PAL 1 PAL 2 SECAM NTSC R9 2.4 k R10 2.7 k R11 5.1 k
AFT 11 Output 12 13 AFT Mode Switch RF AGC Output
C17 0.1
C6 R7 0.1 330 k
R14 10 k
J14
G1 thru G9
C13 0.68 R23 C14 1.5 k 0.05 VCC R22 6.2 k RF RV2 AGC 1.0 k Delay R21 4.3 k
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Table 3. Suggested Components Values for Figure 28
Video IF Carrier Frequency (MHz) SAW Filter FL1 VCO Components Coil L4 Capacitors C19, C20 (pF) 39 39 39 33 47 Picture 38.90 39.50 38.90 45.75 58.75 Sound 32.40 33.50 33.40 41.25 54.25 Siemens # Coilcraft # R4715-A R4715-A R4715-A R4714-A Toko # - - - - (H) B39389-K2951-M100 B39395-J1953-M100 B39389-K2951-M100 1.9 to 3.3 1.9 to 3.3 1.9 to 3.3 1.4 to 2.6 0.8 to 1.5 B39458-M1963-M100 B39588-N1951-M100 M1300-A TKANSAS-T1390HK Sound IF Intercarrier Frequency (MHz) 6.5 6.0 5.5 4.5 Ceramic Filter C27 Quadrature Components Coil L3 Capacitor C25 (pF) 75 56 68 62 15 Resistor R28 (k) 10 10 10 10 10 Murata Erie # SFE6.5MBF SFE6.0MBF SFE5.5MBF SFE4.5MBF - Coilcraft # 90-23 90-25 90-25 90-27 90-29 (H) 6.8 10 10 15 22 5.5 to 6.5
MOTOROLA ANALOG IC DEVICE DATA
25
MC44302A
Figure 29. Evaluation Circuit Board and Component Layout
3.42"
3.60" (Bottom View)
AFT Mode Switch
IF Input
SMB3 G12
Audio Input
Video Output
G8
SW2
SW1 21
SMB2 R31 Q1 R7 C6 G12 J4 R6 W7 R3 12 SW4 W8
Video Mode Switch
G1
4321
J11 TP1
G10 R33
Audio-Video Switch
C5 R5 C7 J6 FL1 TP3 R2
R9 R10 R11
R15 R12 R14 R13
P/N 100062 REV A
RV1
Volume Control
R21 R22 R16 R17
+ C9 TP2 G2
J8
C1 J5 J3 12
PLL Filter (Main VCO Loop) Pin 19
RV2
J20 MC33171 U2 W12 R24 J16 C12 C18
MC44302A U1
MOTOROLA, INC. MC44302A J21 W4 G5 J26 W6
C10
J14 J13 J12
Video IF AGC Filter
L1
R4
R8
C4
C3
SW3
SMB1
C8 +
G7
Sound Intercarrier Output, Sound Input (FM) (AC Couple) Audio Input/ Audio-Video Switch Pin 3 Sound Demodulator Input, AM/FM Select Audio Output (Variable)
C26 R30 R29 R28 D1 G6 G11 J24 R26 R32 J22 J23 R27
C27
RF AGC Delay
G3
C15 C16
R18 R19 R20
W1 W2 L3 C24 +
C25
W11
J17 J18 J19
C19 C20
C23
J27 W3
+ C13 C17 C14
VCC VS Input (12 V) Gnd Audio Output (Constant)
AFT Gain
RV3 J15 W10 W9 C11
L4 C21 R23 + C22 R25
W5
G4
Lock Detector/Filter (Acquisition Circuit) Pin 18
Sound Input (AM) Pin 23
(Top View)
26
MOTOROLA ANALOG IC DEVICE DATA
MC44302A
OUTLINE DIMENSIONS
P SUFFIX PLASTIC PACKAGE CASE 710-02 ISSUE B
NOTES: 1. POSITIONAL TOLERANCE OF LEADS (D), SHALL BE WITHIN 0.25 (0.010) AT MAXIMUM MATERIAL CONDITION, IN RELATION TO SEATING PLANE AND EACH OTHER. 2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSION B DOES NOT INCLUDE MOLD FLASH. DIM A B C D F G H J K L M N MILLIMETERS MIN MAX 36.45 37.21 13.72 14.22 3.94 5.08 0.36 0.56 1.02 1.52 2.54 BSC 1.65 2.16 0.20 0.38 2.92 3.43 15.24 BSC 0_ 15_ 0.51 1.02 INCHES MIN MAX 1.435 1.465 0.540 0.560 0.155 0.200 0.014 0.022 0.040 0.060 0.100 BSC 0.065 0.085 0.008 0.015 0.115 0.135 0.600 BSC 0_ 15_ 0.020 0.040
28
15
B
1 14
A N
C
L
H
G
F D
K
SEATING PLANE
M
J
A
D
28 15 M
DW SUFFIX PLASTIC PACKAGE CASE 751F-05 (SO-28L) ISSUE F
NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSIONS. 4. MAXIMUM MOLD PROTRUSION 0.015 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 2.35 2.65 0.13 0.29 0.35 0.49 0.23 0.32 17.80 18.05 7.40 7.60 1.27 BSC 10.05 10.55 0.41 0.90 0_ 8_
E
H
1 14 PIN 1 IDENT
B
0.25
M
B
L 0.10
SEATING PLANE
e B 0.025
M
C
DIM A A1 B C D E e H L
A1
A
C CA
S
B
q
q
S
MOTOROLA ANALOG IC DEVICE DATA
27
MC44302A
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MC44302A/D MOTOROLA ANALOG IC DEVICE DATA

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